Job Title: Senior PCB Layout Engineer Location: Calabasas, CA Duration: 6+ Months Pay rate range: $65.00 - $90.00/hour on W2 . Description: Client is looking for a Senior PCB Layout Engineer to contribute to our high speed and complex designs. Candidates joining our team will have a great impact and help drive success, by collaborating and participating in new product design and development. Great opportunity to become a member of a well-respected and dynamic team Develop state-of-the-art IP test products Design high speed printed circuit boards Collaborate in an open team environment Job Duties: Design complex, 30+ layer PCB with multiple high density BGAs using Cadence Allegro Build symbols, develop stackups, prescribe pin swaps, import netlist and constraints, familiar with Cadence CM front to back flow Check peer designs and library symbols Take input from and negotiate changes with electrical and mechanical design engineers during development Interface with suppliers to resolve manufacturing related issues Requirements: Advanced Cadence Allegro skills; familiar with CAM 350, OrCad or comparable tools Experience with mixed signal high speed digital up to 100MHZ to 53GHz, 224G, PAM4 Experience with design rule checks (DRC), layout versus schematic checks, and library management Knowledge of design for manufacturing (DFM) and design for test (DFT) Experience with DDR4 DRAM, 2-3 Gbps serial interfaces, LVDS, split power planes, impedance control and matched trace lengths Familiar with fabrication and assembly processes and materials 6+ years of experience in PCB design Knowledgeable of electronics; formal education recommended Willing to adjust current practices to conform to company standards and methods Committed to accuracy, quality and meeting commitments Strong verbal and written communication skills; fluent in English #J-18808-Ljbffr
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